Meinhard Kissich
Ph.D. Student, Graz University of Technology

Meinhard Kissich is a Ph.D. student at Graz University of Technology (TU Graz) in Austria, studying and researching FPGA backend flows, exploitation of physical effects in FPGAs, and applied formal verification. Prior to joining the Embedded Automotive Systems (EAS) Group, he worked at various electronics and semiconductor companies while pursuing his studies. In 2022 he achieved a Master’s degree with distinction in Information and Computer Engineering from Graz University of Technology, after obtaining a Bachelor’s degree in the same field. Meinhard Kissich’s educational journey is not just about the acquisition of knowledge but also about sharing it. During his studies, he was involved as an assistant in Control Systems and held lecture units. He now leads the Real-Time Operating Systems Laboratory course and supports the related lecture held by his Ph.D. supervisor Prof. Marcel Baunach. Apart, Meinhard Kissich thrives on engaging in unique ideas outside convention and evaluating the found solutions.


  • FPGA and ASIC Backends
  • Placement and Routing Algorithms
  • Runtime Reconfigurable Hardware
  • Digital Design, SoC Design
  • ISAX and Processor Architecture
  • Formal Verification


Graz University of Technology
2022 - now
Embedded Automotive Systems Group
Graz University of Technology
2020 - 2022
Dipl.-Ing. (equivalent to MSc)
Program: Information and Computer Engineering (Telematics)
Major: Embedded and Automotive Systems
passed with distinction
Graz University of Technology
2017 - 2020
Program: Information and Computer Engineering (Telematics)
passed with distinction

Recent Publications and Talks

One Solution to Rule Them All: ATTEST as Unified Testing Solution for Programming Courses, 2023, Tagungsband des FG-BS Herbsttreffens
Meinhard Kissich , Kristóf Kanics , Klaus Weinbauer , Tobias Scheipel , Marcel Baunach
A Graphical Guide to Lightweight Block-Level Formal Verification, 2023, ORConf (non peer-reviewed)
Meinhard Kissich
Formal Property Verification for Early Discovery of Functional Flaws in Digital Designs: A Designer’s Guide, 2023, Euromicro Conf. on Digital System Design (DSD)
Meinhard Kissich , Marcel Baunach
ATTEST: Automated and Thorough Testing of Embedded Software in Teaching, 2023, European Conf. on Software Engineering Education
Meinhard Kissich , Klaus Weinbauer , Marcel Baunach
System-on-Chip Design: From Requirements to ASIC -- Open-Source, Optimized, and Human-out-of-the-Loop, 2023, (non peer-reviewed)
Meinhard Kissich , Marcel Baunach


logIP: A Utilization-Aware Logic Analyzer IP Core
Tinybricks: A Bootsector Game
beeMaths: A Well Designed Ruler That Can Save Your Day